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Surface Finishes Compared: HASL, Lead-Free HASL, ENIG, ENEPIG, OSP
GUIDE / PCBELEC
# Surface Finishes Compared: HASL, Lead-Free HASL, ENIG, ENEPIG, OSP
HASL, lead-free HASL, ENIG, ENEPIG and OSP compared on thickness, flatness, cost, shelf life and assembly risk, with the cases where each finish wins.
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## The short answer
A PCB surface finish is a thin metallic or organic coating applied over exposed copper to do three jobs: keep the copper solderable during storage, provide a reliable joint at assembly, and protect the copper from the environment between fabrication and use.
It does not change the circuit. It changes flatness at fine pitch, storage life, contact resistance, wire-bond compatibility and cost. Those five effects are what the choice is actually about.
In practice, five finishes cover almost every order: HASL, lead-free HASL, ENIG, ENEPIG and OSP. Immersion silver and immersion tin appear on a small share of boards for specific reasons, covered below.
## Comparison table
Cost index is indicative and relative to HASL on the same panel; thickness and panel utilisation move it more than the finish itself. Thickness figures follow the IPC specifications named in each section.
| Finish | Coating thickness | Cost index | Shelf life | Choose it for |
| --- | --- | --- | --- | --- |
| HASL (SnPb) | 1–25 µm | 1.0 | 12 months | Cost-first boards, coarse pitch, hand soldering |
| Lead-free HASL | 1–25 µm | 1.05–1.15 | 12 months | Same, in a RoHS-only supply chain |
| ENIG | Ni 3–6 µm, Au 0.04–0.10 µm | 1.4–1.8 | 12 months | Fine pitch, BGA, gold wire bond, long storage |
| ENEPIG | Ni 3–6 µm, Pd 0.05–0.15 µm, Au 0.03–0.05 µm | 2.5–3.5 | 12 months | Wire bond in gold and aluminium, no black pad risk |
| OSP | 0.2–0.5 µm | 1.0–1.1 | 6 months | SMT-only boards, flatness, lowest cost |
| Immersion silver | 0.1–0.3 µm | 1.2–1.4 | 6–12 months | Signal integrity, high frequency, press-fit |
| Immersion tin | 1 µm and above | 1.1–1.3 | 6 months | Press-fit connectors, flat joins |
## HASL and lead-free HASL
Hot air solder levelling dips the board in molten solder and blows it off with an air knife, leaving a solder coating that is thick, metallurgically sound and uneven. The unevenness is the limitation: at 0.4 mm pitch and below, the coating can bridge pads or hold a component off its pads.
Eutectic tin-lead HASL remains the cheapest finish and the most forgiving for hand rework. It is also the one that fails a RoHS declaration, which is why the lead-free version exists: SAC305 at a higher pot temperature and a rougher thermal shock to the laminate. On thick, high-layer boards that thermal shock is a real consideration, since expansion through the stackup is what drives delamination.
Both variants have a place on coarse-pitch boards, through-hole-heavy designs and cost-driven consumer work. Neither belongs on a 0.3 mm BGA footprint.
## ENIG: electroless nickel immersion gold
ENIG deposits 3–6 µm of electroless nickel, which does the barrier work, then 0.04–0.10 µm of immersion gold, which protects the nickel and provides the solderable surface. IPC-4552 is the specification that sets those windows.
The nickel layer is what makes ENIG valuable. It is hard, it is flat to within a micron, and it survives storage and multiple reflows without changing surface chemistry. That combination is why fine-pitch, BGA-heavy and long-shelf-life designs default to it.
The known failure mode is black pad: excessive nickel corrosion during the immersion gold step leaves a phosphorus-rich surface that solders poorly and fractures at the joint interface. It is a process-control problem, not a design problem, and it is why ENIG should be bought with a stated thickness window and a nickel corrosion check rather than as an unqualified "ENIG".
## ENEPIG: the palladium layer
ENEPIG inserts 0.05–0.15 µm of palladium between the nickel and a thinner gold layer of 0.03–0.05 µm, per IPC-4556. The palladium acts as a diffusion barrier, which buys two things: it prevents the nickel corrosion that causes black pad, and it makes the surface bondable with both gold and aluminium wire.
That second property is why ENEPIG exists commercially. A board that needs gold wire bonding in one area and aluminium wedge bonding in another, or a mixed assembly with both soldered and bonded interconnects, has no cheaper single-finish answer. The cost index is the highest in the table, typically two and a half to three and a half times HASL, and it is worth paying only when wire bonding is actually in scope.
## OSP: organic solderability preservative
OSP is not a metal. It is a thin organic film, 0.2–0.5 µm, that bonds to copper and disappears in the flux during soldering. It is the flattest finish available after ENIG and the cheapest way to get a flat pad.
Its limits are storage and thermal cycles. A typical shelf life is six months in sealed packaging, and each reflow consumes part of the film, so a board that needs three passes is at the edge of what the coating tolerates. Probing test points repeatedly wears through it as well. OSP is a good fit for a two-sided SMT board built and shipped within a quarter, and a poor fit for a board that will sit in a warehouse for a year before the second build.
## The two finishes that get skipped
Immersion silver, 0.1–0.3 µm, offers the best high-frequency performance of the group because silver has lower surface resistance than nickel, and it is flat. It tarnishes in sulfur-bearing air, so packaging matters as much as the coating, and creep corrosion is the risk in industrial environments.
Immersion tin, 1 µm and above, is chosen for press-fit connectors, where a soft, flat, solderable surface takes an interference fit without cracking. It carries a tin whisker question that HASL avoids because the coating is reflowed, and its shelf life is short.
Neither is a default. Both are correct for a narrow set of requirements, and both are wrong when specified by habit.
## How to choose in five questions
Specify the finish with a thickness window and the specification it is measured against. "ENIG" alone is an instruction to deposit some nickel and some gold; "ENIG to IPC-4552, nickel 3–6 µm, gold 0.05–0.10 µm" is an order.
What is the finest pitch or smallest BGA on the board? Below 0.5 mm, HASL is out of contention.
Is anything wire bonded? Gold only allows ENIG; gold and aluminium together requires ENEPIG.
How long between fabrication and final assembly? Past six months, OSP and immersion tin drop out.
How many reflow cycles will the board see? Three or more passes favours a metallic finish.
Is there a cost ceiling per square metre that overrides the above? If yes, HASL on coarse pitch is still the honest answer.
## What we need to quote a finish
Three inputs decide the price: the finish and its thickness window, the panel size and utilisation, and the copper area being coated. Two more decide feasibility: the finest pitch and the assembly process, because a finish that cannot survive the reflow profile is not a saving.
Surface finish sits inside a larger materials decision.
[The materials hub ↗](https://www.chinasuqi.com/en/blog/pcb-materials/)
covers laminate, copper weight and finish together,
[controlled impedance ↗](https://www.chinasuqi.com/en/pcb-technologies/controlled-impedance/)
explains where finish thickness enters an impedance stackup, and
[FR-4 versus high-Tg ↗](https://www.chinasuqi.com/en/blog/fr-4-vs-high-tg-laminate-when-the-upgrade-pays/)
covers the laminate half of the same conversation. If the board is going into assembly, the finish also interacts with the stencil and reflow profile, which
[the fabrication hub ↗](https://www.chinasuqi.com/en/blog/pcb-fabrication/)
and
[the PCBA service scope ↗](https://www.chinasuqi.com/en/pcb-assembly/)
describe.
If you are deciding between two finishes on a live design, send the stackup and the assembly process and we will price both against the same panel. The comparison is usually closer than expected, and the deciding factor is often shelf life rather than cost.
Questions, answered
## Before your next build
Is ENIG worth the extra cost over HASL?
Only when flatness or storage life is a constraint. On a 1.6 mm, four-layer board with 1 mm pitch and a three-month build cycle, HASL performs identically for less money. On a 0.4 mm pitch BGA or a board stored for a year, ENIG is the cheaper choice once yield and scrap are counted.
What causes black pad in ENIG?
Nickel corrosion during the immersion gold step, usually from an over-active bath or gold that is too thick. The nickel surface becomes phosphorus-rich, solderability drops and joints fracture at the interface. Buying to a stated thickness window and asking for a corrosion check is the practical control.
Can OSP be used on a board that needs two reflow passes?
Yes, typically. Two passes are within what a standard OSP coating tolerates. Three or more, or any wave or selective soldering afterwards, moves the decision toward a metallic finish.
Does surface finish affect impedance?
It affects it slightly. A metallic finish adds a conductive layer over the trace, which shifts impedance by a small percentage at high frequency. For controlled impedance boards, state the finish in the stackup so the calculator uses the right value rather than assuming bare copper.
CONTINUE YOUR REVIEW
## Related manufacturing resources
Explore
### [PCB Materials ↗](https://www.chinasuqi.com/en/blog/pcb-materials/)
How to choose a laminate, copper weight and surface finish for a PCB: which properties actually decide the grade, which specifications are habit, and what a materials choice costs in 2026.
Explore
### [PCB Fabrication ↗](https://www.chinasuqi.com/en/blog/pcb-fabrication/)
An index to what happens between a released Gerber package and a board that passes final inspection: lamination, drill, plating, imaging, finish, and the process limits that decide what is buildable.
guide
### [FR-4 vs High-Tg Laminate: When the Upgrade Pays for Itself ↗](https://www.chinasuqi.com/en/blog/fr-4-vs-high-tg-laminate-when-the-upgrade-pays/)
High-Tg laminate is often specified by default and often wasted. Three conditions decide whether the upgrade buys reliability or just a higher price, and one of them is not the operating temperature.
technology
### [Controlled Impedance PCB Fabrication ↗](https://www.chinasuqi.com/en/pcb-technologies/controlled-impedance/)
Prepare controlled impedance PCB requirements: target values, single-ended or differential structures, reference layers, stackup and TDR verification.
YOUR NEXT PCB PROJECT
## Let’s define your next build.
Start with your files, requirements and target date.
[Prepare a PCB inquiry ↗](https://www.chinasuqi.com/en/request-a-quote/)

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